Dynamic range of RF converters is dependant on a number of factors. For example, the linearity is susceptible to process variation and mismatch, as well as temperature. Such factors are generally beyond the control of integrated circuit designers, once the converter is designed. If the RF converter performance is optimized for a nominal process, with perfect matching and a known temperature, any change in these factors results in a change in actual performance of the circuit that is less than optimal.
One conventional technique for achieving desired linearity is to design for yield (DFY). This design methodology essentially ensures that the RF converter design is robust against process variation and mismatch. However, DFY generally requires conservative design practice, which limits the applications for which it is appropriate. Moreover, peak performance capability of the fabrication process is avoided if it does not have reasonable yield.
Another conventional technique for achieving desired linearity is the use of non-autonomous measurement and control utilizing off-chip or otherwise external equipment, or even human interaction, in the loop. While such techniques may provide a degree of effectiveness, they require additional system resources, and tend to consume more time, especially if human interaction is involved.
There is a need, therefore, for techniques for optimization of RF converters.